Almost every significant SoC design start today contains multiple cores – including DSPs, microprocessors, hardware accelerators and other system resources. Managing those resources poses a considerable problem from a system and software design perspective. SystemWeaver provides a very efficient hardware solution to this software problem. Although SystemWeaver offers the maximum payback when deployed in multicore chips containing higher numbers of computing resources, the benefits of flexibility and improved debugging capability can also be leveraged in traditional ‘RISC plus DSP’ multicore architectures.
“We believe the recognition by Gartner of the potential impact of our technology is further substantiation of our innovative solution for on-chip system management of multicore devices,” stated Rick Clucas, Ignios CEO. “Our opportunity to make a significant business impact is clear, due to the market potential for multicore solutions and the direct economic benefit that comes from deploying SystemWeaver.”
About Gartner’s Cool Vendors Selection Process
Gartner’s listing does not constitute an exhaustive list of vendors in any given technology area, but rather is designed to highlight interesting, new and innovative vendors, products and services. Gartner disclaims all warranties, expressed or implied, with respect to this research, including any warranties of merchantability or fitness of a particular purpose.
Gartner defines a cool vendor as a company that offers technologies or solutions that are: Innovative, enable users to do things they couldn’t do before; Impactful, have, or will have, business impact (not just technology for the sake of technology); Intriguing, have caught Gartner’s interest or curiosity in approximately the past six months.
About SystemWeaver
SystemWeaver addresses the software and hardware challenges presented by the proliferation of all multicore architectures – simple and complex – in the embedded chip market. The SystemWeaver API provides a unified abstraction layer for complex multicore devices. This abstraction allows embedded systems companies to develop and debug multicore applications more effectively, improving time to market. The key underlying system management and communications functions are implemented natively in a SystemWeaver IP core that is integrated on-chip. SystemWeaver unlocks the full performance of the multicore hardware, with significant cost, power and performance benefits that maximise product competitiveness.
SystemWeaver release v1.0 is available now and consists of the parameterisable, synthesisable SystemWeaver IP core and the SystemWeaver API. A SystemC model of the core and reference models of SystemWeaver-enabled SoCs are also provided.
About Ignios Ltd.
Ignios was established in 2003 to develop and market products that enable the real-time on-chip system management of multicore SoC devices. Ignios raised a total of $3.8 million in a first round of private financing early in 2004. The funding round was jointly led by Alice Lab and BTG. Further information on Ignios can be found at www.ignios.com.